3ed6f774573f5a4c1757001c0c34a42a836a440a,rvm/src/org/jikesrvm/compilers/opt/lir2mir/ia32/BURS_Helpers.java,BURS_Helpers,INT_2LONG,#Instruction#RegisterOperand#Operand#boolean#,746
Before Change
} else {
//MOVZX, MOVSX doesn't accept memory as target
EMIT(CPOS(s, MIR_Move.create(IA32_MOV, result,value)));
if (signExtend) {
EMIT(CPOS(s,MIR_BinaryAcc.create(IA32_SHL,
result.copy(),
LC(32))));
EMIT(MIR_BinaryAcc.mutate(s,IA32_SAR,
result.copy(),
LC(32)));
} else {
EMIT(CPOS(s,MIR_BinaryAcc.create(IA32_SHL,
result.copy(),
LC(32))));
EMIT(MIR_BinaryAcc.mutate(s,IA32_SHR,
result.copy(),
LC(32)));
After Change
IC(0)));
}
} else {
if (signExtend) {
if (result.isRegister()) {
EMIT(MIR_Unary.mutate(s, IA32_MOVSXDQ, result, value));
} else {
// MOVSX only accepts registers as target
RegisterOperand tempLong = regpool.makeTempLong();
EMIT(CPOS(s, MIR_Unary.create(IA32_MOVSXDQ, tempLong, value)));
EMIT(MIR_Move.mutate(s, IA32_MOV,
result,
tempLong.copy()));
}
} else {
RegisterOperand temp = regpool.makeTempInt();
EMIT(CPOS(s, MIR_Move.create(IA32_MOV, temp, value)));
RegisterOperand tempLong = regpool.makeTempLong();
EMIT(CPOS(s, MIR_Move.create(IA32_MOV, tempLong, temp.copy())));
EMIT(MIR_Move.mutate(s, IA32_MOV,
result,
tempLong.copy()));